280 search results - page 10 / 56 » Challenges in exploitation of loop parallelism in embedded a... |
ISCAPDCS
2001
13 years 9 months ago
2001
-Multi-dimensional applications, such as image processing and seismic analysis, usually require the optimized performance obtained from instruction-level parallelism. The critical ...
IEEEPACT
2002
IEEE
14 years 1 months ago
2002
IEEE
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. Embedded devices designed for various real-time multimedia and telecom applications, have a bottleneck in energy consumption and performance that becomes day by day more ...
ECRTS
2010
IEEE
13 years 9 months ago
2010
IEEE
A full exploitation of the computational power available in a multi-core platform requires the software to be specified in terms of parallel execution flows. At the same time, mode...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...