280 search results - page 39 / 56 » Challenges in exploitation of loop parallelism in embedded a... |
IPPS
2009
IEEE
14 years 1 months ago
2009
IEEE
Stencil computation (SC) is of critical importance for broad scientific and engineering applications. However, it is a challenge to optimize complex, highorder SC on emerging clus...
IPPS
2009
IEEE
14 years 1 months ago
2009
IEEE
The availability of easily programmable manycore CPUs and GPUs has motivated investigations into how to best exploit their tremendous computational power for scientific computing...
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
ASPLOS
2008
ACM
13 years 8 months ago
2008
ACM
The recent shift in the industry towards chip multiprocessor (CMP) designs has brought the need for multi-threaded applications to mainstream computing. As observed in several lim...
CC
2006
Springer
13 years 10 months ago
2006
Springer
The polyhedral model is known to be a powerful framework to reason about high level loop transformations. Recent developments in optimizing compilers broke some generally accepted ...