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MICRO
1998
IEEE
89views Hardware» more  MICRO 1998»
13 years 12 months ago
Load Latency Tolerance in Dynamically Scheduled Processors
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
Srikanth T. Srinivasan, Alvin R. Lebeck
VEE
2012
ACM
239views Virtualization» more  VEE 2012»
12 years 3 months ago
Transparent dynamic instrumentation
Process virtualization provides a virtual execution environment within which an unmodified application can be monitored and controlled while it executes. The provided layer of co...
Derek Bruening, Qin Zhao, Saman P. Amarasinghe
LCTRTS
2005
Springer
14 years 1 months ago
Generation of permutations for SIMD processors
Short vector (SIMD) instructions are useful in signal processing, multimedia, and scientific applications. They offer higher performance, lower energy consumption, and better res...
Alexei Kudriavtsev, Peter M. Kogge
CPHYSICS
2007
71views more  CPHYSICS 2007»
13 years 7 months ago
Simulation of n-qubit quantum systems. III. Quantum operations
During the last decade, several quantum information protocols, such as quantum key distribution, teleportation or quantum computation, have attracted a lot of interest. Despite th...
T. Radtke, S. Fritzsche
FCCM
2008
IEEE
160views VLSI» more  FCCM 2008»
14 years 2 months ago
Facilitating Processor-Based DPR Systems for non-DPR Experts
Currently, only Xilinx Field Programmable Gate Arrays (FPGAs) support Dynamic Partial Reconfiguration (DPR). While there is currently some Computer Aided Design (CAD) tool support...
Edward Chen, William A. Gruver, Dorian Sabaz, Lesl...