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» Characterizing Linear Size Circuits in Terms of Privacy
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GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
14 years 2 months ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram
CCS
2010
ACM
13 years 7 months ago
Modeling attacks on physical unclonable functions
We show in this paper how several proposed Physical Unclonable Functions (PUFs) can be broken by numerical modeling attacks. Given a set of challenge-response pairs (CRPs) of a PU...
Ulrich Rührmair, Frank Sehnke, Jan Sölte...
TCC
2010
Springer
173views Cryptology» more  TCC 2010»
14 years 4 months ago
Bounds on the Sample Complexity for Private Learning and Private Data Release
Learning is a task that generalizes many of the analyses that are applied to collections of data, and in particular, collections of sensitive individual information. Hence, it is n...
Amos Beimel, Shiva Prasad Kasiviswanathan, Kobbi N...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
ANCS
2006
ACM
14 years 1 months ago
A practical fast parallel routing architecture for Clos networks
Clos networks are an important class of switching networks due to their modular structure and much lower cost compared with crossbars. For routing I/O permutations of Clos network...
Si-Qing Zheng, Ashwin Gumaste, Enyue Lu