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113
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HIPEAC
2009
Springer
15 years 9 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...
120
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EMSOFT
2009
Springer
15 years 8 months ago
Cache-aware scheduling and analysis for multicores
The major obstacle to use multicores for real-time applications is that we may not predict and provide any guarantee on real-time properties of embedded software on such platforms...
Nan Guan, Martin Stigge, Wang Yi, Ge Yu
TLCA
2009
Springer
15 years 8 months ago
A Logical Foundation for Environment Classifiers
Taha and Nielsen have developed a multi-stage calculus λα with a sound type system using the notion of environment classifiers. They are special identifiers, with which code fr...
Takeshi Tsukada, Atsushi Igarashi
132
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NDSS
2008
IEEE
15 years 8 months ago
Automatic Network Protocol Analysis
Protocol reverse engineering is the process of extracting application-level specifications for network protocols. Such specifications are very helpful in a number of security-re...
Gilbert Wondracek, Paolo Milani Comparetti, Christ...
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
15 years 8 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood