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IPPS
2006
IEEE
14 years 27 days ago
Algorithm-based checkpoint-free fault tolerance for parallel matrix computations on volatile resources
As the desire of scientists to perform ever larger computations drives the size of today’s high performance computers from hundreds, to thousands, and even tens of thousands of ...
Zizhong Chen, Jack Dongarra
ISCA
1989
IEEE
109views Hardware» more  ISCA 1989»
13 years 11 months ago
Improving Performance of Small On-Chip Instruction Caches
Most current single-chip processors employ an on-chip instruction cache to improve performance. A miss in this insk-uction cache will cause an external memory reference which must...
Matthew K. Farrens, Andrew R. Pleszkun
SAC
2006
ACM
13 years 6 months ago
High performance XSL-FO rendering for variable data printing
High volume print jobs are getting more common due to the growing demand for personalized documents. In this context, Variable Data Printing (VDP) has become a useful tool for mar...
Fabio Giannetti, Luiz Gustavo Fernandes, Rogerio T...
ISCA
1998
IEEE
151views Hardware» more  ISCA 1998»
13 years 11 months ago
Alternative Implementations of Two-Level Adaptive Branch Prediction
As the issue rate and depth of pipelining of high performance Superscalar processors increase, the importance of an excellent branch predictor becomes more vital to delivering the...
Tse-Yu Yeh, Yale N. Patt
ISJGP
2010
13 years 4 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos