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ISCAS
2006
IEEE
109views Hardware» more  ISCAS 2006»
14 years 2 months ago
Feature-oriented multiple description image coding
— In this paper, we introduce a novel wavelet-based multiple description image coder, referred to as the feature-oriented MDC (FOMDC). The proposed multiple description coder exp...
Yilong Liu, Soontorn Oraintara
ASAP
2004
IEEE
101views Hardware» more  ASAP 2004»
14 years 16 days ago
Register Organization for Enhanced On-Chip Parallelism
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
Rama Sangireddy
EEE
2004
IEEE
14 years 15 days ago
The Design of QoS Broker Algorithms for QoS-Capable Web Services
QoS (Quality of Service) support in Web services is an important issue since it ensures service usability and utility for each client and, in addition, improves server utilization...
Tao Yu, Kwei-Jay Lin
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
14 years 10 days ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
ICS
1995
Tsinghua U.
14 years 10 days ago
A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality
Current data cache organizations fail to deliver high performance in scalar processors for many vector applications. There are two main reasons for this loss of performance: the u...
Antonio González, Carlos Aliagas, Mateo Val...