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SIGARCH
2008
94views more  SIGARCH 2008»
13 years 10 months ago
Optimized on-chip pipelining of memory-intensive computations on the cell BE
Multiprocessors-on-chip, such as the Cell BE processor, regularly suffer from restricted bandwidth to off-chip main memory. We propose to reduce memory bandwidth requirements, and...
Christoph W. Kessler, Jörg Keller
ACTA
2005
92views more  ACTA 2005»
13 years 10 months ago
Type-based information flow analysis for the pi-calculus
We propose a new type system for information flow analysis for the -calculus. As demonstrated by recent studies, information about whether each communication succeeds is important ...
Naoki Kobayashi
FMSD
2002
128views more  FMSD 2002»
13 years 9 months ago
Combining Software and Hardware Verification Techniques
Combining verification methods developed separately for software and hardware is motivated by the industry's need for a technology that would make formal verification of reali...
Robert P. Kurshan, Vladimir Levin, Marius Minea, D...
IFE
2002
69views more  IFE 2002»
13 years 9 months ago
Generierung interaktiver Animationen von Berechnungsmodellen
In this article we introduce two new generative approaches of animated computational models. These approaches are applied in context of educational software systems for compiler de...
Stephan Diehl, Andreas Kerren
MSCS
1998
58views more  MSCS 1998»
13 years 9 months ago
Minimal Realization in Bicategories of Automata
The context of this article is the program to develop monoidal bicategories with a feedback operation as an algebra of processes, with applications to concurrency theory. The obje...
Robert D. Rosebrugh, Nicoletta Sabadini, Robert F....