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» Chordal Topologies for Interconnection Networks
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HPCC
2005
Springer
14 years 2 months ago
Enabling the P2P JXTA Platform for High-Performance Networking Grid Infrastructures
Abstract. As grid sizes increase, the need for self-organization and dynamic reconfigurations is becoming more and more important, and therefore the convergence of grid computing ...
Gabriel Antoniu, Mathieu Jan, David A. Noblet
MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
14 years 3 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim
CAL
2007
13 years 8 months ago
Logic-Based Distributed Routing for NoCs
—The design of scalable and reliable interconnection networks for multicore chips (NoCs) introduces new design constraints like power consumption, area, and ultra low latencies. ...
José Flich, José Duato
CN
2008
108views more  CN 2008»
13 years 8 months ago
Finding a dense-core in Jellyfish graphs
The connectivity of the Internet crucially depends on the relationships between thousands of Autonomous Systems (ASes) that exchange routing information using the Border Gateway P...
Mira Gonen, Dana Ron, Udi Weinsberg, Avishai Wool
FPL
2008
Springer
153views Hardware» more  FPL 2008»
13 years 10 months ago
Exploring FPGA network on chip implementations across various application and network loads
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
Graham Schelle, Dirk Grunwald