236 search results - page 45 / 48 » Chordal Topologies for Interconnection Networks |
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
JSA
2007
13 years 7 months ago
2007
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...
CCE
2004
13 years 7 months ago
2004
In the literature, optimization models deal with planning and scheduling of several subsystems of the petroleum supply chain such as oilfield infrastructure, crude oil supply, ref...
TCAD
2002
13 years 7 months ago
2002
In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
IJHPCA
2010
13 years 4 months ago
2010
Emergence of new parallel architectures presents new challenges for application developers. Supercomputers vary in processor speed, network topology, interconnect communication ch...