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» Circuit Bipartitioning Using Genetic Algorithm
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GECCO
2006
Springer
137views Optimization» more  GECCO 2006»
14 years 2 months ago
Evolutionary design of fault-tolerant analog control for a piezoelectric pipe-crawling robot
In this paper, a genetic algorithm (GA) is used to design faulttolerant analog controllers for a piezoelectric micro-robot. Firstorder and second-order functions are developed to ...
Geoffrey A. Hollinger, David A. Gwaltney
EH
2003
IEEE
247views Hardware» more  EH 2003»
14 years 4 months ago
Evolvable Building Blocks for Analog Fuzzy Logic Controllers
This work discusses the use of an Evolvable Hardware (EHW) platform in the synthesis of analog electronic circuits for Fuzzy Logic Controllers. A Fuzzy Logic Controller (FLC) is d...
Jorge Luís Machado do Amaral, José F...
DAC
1999
ACM
14 years 3 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
ISVLSI
2007
IEEE
151views VLSI» more  ISVLSI 2007»
14 years 5 months ago
Design of a MCML Gate Library Applying Multiobjective Optimization
In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of e...
Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfg...
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
14 years 3 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng