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ARITH
2001
IEEE
14 years 19 days ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee
DAC
2008
ACM
13 years 10 months ago
DeMOR: decentralized model order reduction of linear networks with massive ports
Model order reduction is an efficient technique to reduce the system complexity while producing a good approximation of the input-output behavior. However, the efficiency of reduc...
Boyuan Yan, Lingfei Zhou, Sheldon X.-D. Tan, Jie C...
TSMC
2008
137views more  TSMC 2008»
13 years 8 months ago
A Type-2 Self-Organizing Neural Fuzzy System and Its FPGA Implementation
This paper proposes a type-2 self-organizing neural fuzzy system (T2SONFS) and its hardware implementation. The antecedent parts in each T2SONFS fuzzy rule are interval type-2 fuzz...
Chia-Feng Juang, Yu-Wei Tsao
CORR
2011
Springer
202views Education» more  CORR 2011»
13 years 4 months ago
High Degree Vertices, Eigenvalues and Diameter of Random Apollonian Networks
ABSTRACT. Upon the discovery of power laws [8, 16, 30], a large body of work in complex network analysis has focused on developing generative models of graphs which mimick real-wor...
Alan M. Frieze, Charalampos E. Tsourakakis
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
11 years 11 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...