Sciweavers

3395 search results - page 134 / 679
» Circuit-aware architectural simulation
Sort
View
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
15 years 10 months ago
An SPU reference model for simulation, random test generation and verification
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...
IFIP
2001
Springer
15 years 9 months ago
A Standardized Co-simulation Backbone
: In the field of co-simulation, the construction of a bridge between different simulators and the solution of problems like synchronization and data translation are some of the ma...
Braulio Adriano de Mello, Flávio Rech Wagne...
DAC
2000
ACM
15 years 9 months ago
Modeling and simulation of real defects using fuzzy logic
Real defects (e.g. stuck-at or bridging faults) in the VLSI circuits cause intermediate voltages and can not be modeled as ideal shorts. In this paper we first show that the trad...
Amir Attarha, Mehrdad Nourani, Caro Lucas
DAC
2000
ACM
15 years 9 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...
ASIASIM
2004
Springer
15 years 10 months ago
A Scalable, Ordered Scenario-Based Network Security Simulator
A network security simulator becomes more useful for the study on the cyber incidents and their defense mechanisms, as cyber terrors have been increasingly popular. Until now, netw...
Joo Beom Yun, Eung Ki Park, Eul-Gyu Im, Hoh Peter ...