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» Circuits, Pebbling and Expressibility
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ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 10 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez
AVSS
2007
IEEE
14 years 1 months ago
Towards robust face recognition for Intelligent-CCTV based surveillance using one gallery image
In recent years, the use of Intelligent Closed-Circuit Television (ICCTV) for crime prevention and detection has attracted significant attention. Existing face recognition system...
Ting Shan, Shaokang Chen, Conrad Sanderson, Brian ...
GECCO
2006
Springer
202views Optimization» more  GECCO 2006»
13 years 11 months ago
Inference of genetic networks using S-system: information criteria for model selection
In this paper we present an evolutionary approach for inferring the structure and dynamics in gene circuits from observed expression kinetics. For representing the regulatory inte...
Nasimul Noman, Hitoshi Iba
CORR
2007
Springer
79views Education» more  CORR 2007»
13 years 7 months ago
Logic Meets Algebra: the Case of Regular Languages
The study of finite automata and regular languages is a privileged meeting point of algebra and logic. Since the work of Büchi, regular languages have been classified according ...
Pascal Tesson, Denis Thérien
DAC
2003
ACM
14 years 8 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav