191 search results - page 14 / 39 » Clock Distribution Design in VLSI Circuits. An Overview |
144
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ISPD
2005
ACM
15 years 9 months ago
2005
ACM
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
121
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VLSID
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper provides a theoretical basis for eliminating or reducing the energy consumption due to transients in a synchronous digital circuit. The transient energy is minimized wh...
123
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VLSI
2010
Springer
14 years 11 months ago
2010
Springer
Although local biasing of components used in an analog circuit is shown to be a very attractive design methodology, significantly simplifying the design procedure [3], it makes the...
128
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ICCAD
2002
IEEE
16 years 1 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
124
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FPGA
2004
ACM
15 years 9 months ago
2004
ACM
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...