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» Clock Synchronization Algorithms for Network Measurements
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DSN
2005
IEEE
14 years 1 months ago
Design Time Reliability Analysis of Distributed Fault Tolerance Algorithms
Designing a distributed fault tolerance algorithm requires careful analysis of both fault models and diagnosis strategies. A system will fail if there are too many active faults, ...
Elizabeth Latronico, Philip Koopman
TCAD
2008
100views more  TCAD 2008»
13 years 7 months ago
Robust Clock Tree Routing in the Presence of Process Variations
Abstract--Advances in very large-scale integration technology make clock skew more susceptible to process variations. Notwithstanding efficient exact zero-skew algorithms, clock sk...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
GLOBECOM
2007
IEEE
14 years 1 months ago
A Geometric Approach to Slot Alignment in Wireless Sensor Networks
— Traditionally, slotted communication protocols have employed guard times to delineate and align slots. These guard times may expand the slot duration significantly, especially...
Niky Riga, Ibrahim Matta, Azer Bestavros
DAC
2008
ACM
14 years 8 months ago
Variation-adaptive feedback control for networks-on-chip with multiple clock domains
This paper discusses the use of networks-on-chip (NoCs) consisting of multiple voltage-frequency islands to cope with power consumption, clock distribution and parameter variation...
Ümit Y. Ogras, Diana Marculescu, Radu Marcule...
FMICS
2008
Springer
13 years 9 months ago
Extending Structural Test Coverage Criteria for Lustre Programs with Multi-clock Operators
Lustre is a formal synchronous declarative language widely used for modeling and specifying safety-critical applications in the elds of avionics, transportation or energy productio...
Virginia Papailiopoulou, Laya Madani, Lydie du Bou...