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DAC
2007
ACM
14 years 8 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
INFOCOM
2008
IEEE
14 years 2 months ago
A Distributed Optimization Algorithm for Multi-Hop Cognitive Radio Networks
Cognitive radio (CR) is a revolution in radio technology and is viewed as an enabling technology for dynamic spectrum access. This paper investigates how to design distributed alg...
Yi Shi, Y. Thomas Hou
CGO
2003
IEEE
14 years 26 days ago
Compiler Optimization-Space Exploration
To meet the performance demands of modern architectures, compilers incorporate an everincreasing number of aggressive code transformations. Since most of these transformations are...
Spyridon Triantafyllis, Manish Vachharajani, Neil ...
NOCS
2010
IEEE
13 years 6 months ago
Evaluating Bufferless Flow Control for On-chip Networks
—With the emergence of on-chip networks, the power consumed by router buffers has become a primary concern. Bufferless flow control addresses this issue by removing router buffe...
George Michelogiannakis, Daniel Sanchez, William J...
ICRA
2009
IEEE
161views Robotics» more  ICRA 2009»
13 years 5 months ago
Control for throwing manipulation by one joint robot
This paper proposes a throwing manipulation strategy for a robot with one revolute joint. The throwing manipulation enables the robot not only to manipulate the object to outside o...
Hideyuki Miyashita, Tasuku Yamawaki, Masahito Yash...