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JUCS
2006
112views more  JUCS 2006»
13 years 8 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
DSD
2002
IEEE
96views Hardware» more  DSD 2002»
14 years 1 months ago
Networks on Silicon: Blessing or Nightmare?
Continuing VLSI technology scaling raises several deep submicron (DSM) problems like relatively slow interconnect, power dissipation and distribution, and signal integrity. Those ...
Paul Wielage, Kees G. W. Goossens
HPDC
1996
IEEE
14 years 17 days ago
Controlling QoS in a Collaborative Multimedia Environment
A collaborative multimedia environment allows users to work remotely on common projects by sharing applications (e.g., CAD tools, text editors, white boards) and simultaneously co...
Marco Alfano, Rolf Sigle
EUROPAR
2009
Springer
14 years 8 days ago
Fast and Efficient Synchronization and Communication Collective Primitives for Dual Cell-Based Blades
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
Epifanio Gaona, Juan Fernández, Manuel E. A...
EUROPAR
2010
Springer
13 years 8 months ago
Multi-GPU and Multi-CPU Parallelization for Interactive Physics Simulations
Today, it is possible to associate multiple CPUs and multiple GPUs in a single shared memory architecture. Using these resources efficiently in a seamless way is a challenging issu...
Everton Hermann, Bruno Raffin, François Fau...