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CASES
2010
ACM
13 years 8 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
SIGSOFT
2004
ACM
14 years 11 months ago
Implementing protocols via declarative event patterns
This paper introduces declarative event patterns (DEPs) as a means to implement protocols while improving their traceability, comprehensibility, and maintainability. DEPs are desc...
Robert J. Walker, Kevin Viggers
COORDINATION
2009
Springer
14 years 11 months ago
High-Performance Transactional Event Processing
This paper presents a transactional framework for low-latency, high-performance, concurrent event processing in Java. At the heart of our framework lies Reflexes, a restricted prog...
Antonio Cunei, Rachid Guerraoui, Jesper Honig Spri...
ICFP
2007
ACM
14 years 10 months ago
Type-safe higher-order channels in ML-like languages
As a means of transmitting not only data but also code encapsulated within functions, higher-order channels provide an advanced form of task parallelism in parallel computations. ...
Sungwoo Park
ICS
2009
Tsinghua U.
14 years 5 months ago
Adagio: making DVS practical for complex HPC applications
Power and energy are first-order design constraints in high performance computing. Current research using dynamic voltage scaling (DVS) relies on trading increased execution time...
Barry Rountree, David K. Lowenthal, Bronis R. de S...