Sciweavers

966 search results - page 171 / 194
» Code Generation for Embedded Processors
Sort
View
EMSOFT
2004
Springer
14 years 2 months ago
Binary translation to improve energy efficiency through post-pass register re-allocation
Energy efficiency is rapidly becoming a first class optimization parameter for modern systems. Caches are critical to the overall performance and thus, modern processors (both hig...
Kun Zhang, Tao Zhang, Santosh Pande
CODES
2007
IEEE
14 years 18 days ago
Energy efficient co-scheduling in dynamically reconfigurable systems
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...
Pao-Ann Hsiung, Pin-Hsien Lu, Chih-Wen Liu
ISCA
2002
IEEE
104views Hardware» more  ISCA 2002»
13 years 8 months ago
Speculative Dynamic Vectorization
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
Alex Pajuelo, Antonio González, Mateo Valer...
AOSD
2012
ACM
12 years 4 months ago
Reusing non-functional concerns across languages
Emerging languages are often source-to-source compiled to mainstream ones, which offer standardized, fine-tuned implementations of non-functional concerns (NFCs)—including pers...
Myoungkyu Song, Eli Tilevich
ASPLOS
2012
ACM
12 years 4 months ago
Comprehensive kernel instrumentation via dynamic binary translation
Dynamic binary translation (DBT) is a powerful technique that enables fine-grained monitoring and manipulation of an existing program binary. At the user level, it has been emplo...
Peter Feiner, Angela Demke Brown, Ashvin Goel