This paper proposes an automatic design flow from userfriendly design to efficient implementation of video processing systems. This design flow starts with the use of coarsegrain ...
Abstract. Many-core processor architectures require scalable solutions that reflect the locality and power constraints of future generations of technology. This paper presents a CM...
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
System design based on static task graphs does not match well with modern consumer electronic devices with dynamic stream processing applications. We propose the TTL API for task ...
Tomas Henriksson, Jeffrey Kang, Pieter van der Wol...
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...