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» Code Optimization Techniques for Embedded DSP Microprocessor...
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CODES
2009
IEEE
13 years 8 months ago
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis
SENSYS
2006
ACM
14 years 1 months ago
Supporting concurrent applications in wireless sensor networks
It is vital to support concurrent applications sharing a wireless sensor network in order to reduce the deployment and administrative costs, thus increasing the usability and efï¬...
Yang Yu, Loren J. Rittle, Vartika Bhandari, Jason ...
CODES
2005
IEEE
14 years 1 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
LCTRTS
2007
Springer
14 years 1 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
ICIP
1999
IEEE
14 years 9 months ago
Long-Term Memory Prediction Using Affine Motion Compensation
Long-term memory prediction extends motion compensation from the previous frame to several past frames with the result of increased coding efficiency. In this paper we demonstrate...
Thomas Wiegand, Eckehard G. Steinbach, Bernd Girod