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EUROPAR
1999
Springer
13 years 12 months ago
An Architecture Framework for Introducing Predicated Execution into Embedded Microprocessors
Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism ILP techniques that are traditionally used in high perform...
Daniel A. Connors, Jean-Michel Puiatti, David I. A...
SAMOS
2004
Springer
14 years 1 months ago
MOUSE: A Shortcut from Matlab Source to SIMD DSP Assembly Code
Abstract. This article presents a novel design flow called MOUSE for the effective development of digital signal processing systems in terms of development time, performance and p...
Gordon Cichon, Gerhard Fettweis
ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
13 years 12 months ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik
ASPDAC
2006
ACM
288views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Algorithms and DSP implementation of H.264/AVC
Abstract - This survey paper intends to provide a comprehensive coverage of the techniques that are pertinent to the processor-based implementation of H.264/AVC video codec, partic...
Hung-Chih Lin, Yu-Jen Wang, Kai-Ting Cheng, Shang-...
MEMOCODE
2010
IEEE
13 years 5 months ago
Feldspar: A domain specific language for digital signal processing algorithms
A new language, Feldspar, is presented, enabling high-level and platform-independent description of digital signal processing (DSP) algorithms. Feldspar is a pure functional langua...
Emil Axelsson, Koen Claessen, Gergely Dévai...