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» Code Synthesis for Timed Automata
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TC
2010
13 years 3 months ago
Generating Reliable Code from Hybrid-Systems Models
Hybrid systems have emerged as an appropriate formalism to model embedded systems as they capture the theme of continuous dynamics with discrete control. Under this paradigm, distr...
Madhukar Anand, Sebastian Fischmeister, Yerang Hur...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
14 years 9 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
CONCUR
1992
Springer
14 years 24 days ago
The Duality of TIme and Information
The states of a computing system bear information and change time, while its events bear time and change information. We develop a primitive algebraic model of this duality of tim...
Vaughan R. Pratt
LCTRTS
2004
Springer
14 years 2 months ago
Flattening statecharts without explosions
We present a polynomial upper bound for flattening of UML statecharts. An efficient flattening technique is derived and implemented in SCOPE—a code generator targeting constra...
Andrzej Wasowski
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
14 years 9 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...