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» Code Transformations to Improve Memory Parallelism
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IEEEPACT
2003
IEEE
14 years 1 months ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
ICS
1999
Tsinghua U.
14 years 28 days ago
Eliminating synchronization bottlenecks in object-based programs using adaptive replication
This paper presents a technique, adaptive replication, for automatically eliminating synchronization bottlenecks in multithreaded programs that perform atomic operations on object...
Martin C. Rinard, Pedro C. Diniz
IPCCC
2007
IEEE
14 years 3 months ago
Application Insight Through Performance Modeling
Tuning the performance of applications requires understanding the interactions between code and target architecture. This paper describes a performance modeling approach that not ...
Gabriel Marin, John M. Mellor-Crummey
HPCA
2007
IEEE
14 years 9 months ago
Colorama: Architectural Support for Data-Centric Synchronization
With the advent of ubiquitous multi-core architectures, a major challenge is to simplify parallel programming. One way to tame one of the main sources of programming complexity, n...
Luis Ceze, Pablo Montesinos, Christoph von Praun, ...
APLAS
2008
ACM
13 years 10 months ago
Context-Sensitive Relevancy Analysis for Efficient Symbolic Execution
Abstract. Symbolic execution is a flexible and powerful, but computationally expensive technique to detect dynamic behaviors of a program. In this paper, we present a context-sensi...
Xin Li, Daryl Shannon, Indradeep Ghosh, Mizuhito O...