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» Code Transformations to Improve Memory Parallelism
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DATE
2008
IEEE
156views Hardware» more  DATE 2008»
14 years 3 months ago
Transparent Reconfigurable Acceleration for Heterogeneous Embedded Applications
Embedded systems are becoming increasingly complex. Besides the additional processing capabilities, they are characterized by high diversity of computational models coexisting in ...
Antonio Carlos Schneider Beck, Mateus B. Rutzig, G...
LOPSTR
2004
Springer
14 years 2 months ago
Determinacy Analysis for Logic Programs Using Mode and Type Information
We propose an analysis for detecting procedures and goals that are deterministic (i.e. that produce at most one solution), or predicates whose clause tests are mutually exclusive (...
Pedro López-García, Francisco Bueno,...
JSA
2000
175views more  JSA 2000»
13 years 8 months ago
Complete worst-case execution time analysis of straight-line hard real-time programs
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...
Friedhelm Stappert, Peter Altenbernd
ASPLOS
2009
ACM
14 years 9 months ago
Understanding software approaches for GPGPU reliability
Even though graphics processors (GPUs) are becoming increasingly popular for general purpose computing, current (and likely near future) generations of GPUs do not provide hardwar...
Martin Dimitrov, Mike Mantor, Huiyang Zhou
ICPPW
2009
IEEE
14 years 3 months ago
Load Balancing Concurrent BPEL Processes by Dynamic Selection of Web Service Endpoints
Business workflows implemented as BPEL processes play an important role for many business applications. BPEL is used to orchestrate a series of Web service calls. Which provider ...
Marvin Ferber, Sascha Hunold, Thomas Rauber