272 search results - page 8 / 55 » Code Transformations to Improve Memory Parallelism |
CLUSTER
2004
IEEE
14 years 9 days ago
2004
IEEE
Improving memory performance at software level is more effective in reducing the rapidly expanding gap between processor and memory performance. Loop transformations (e.g. loop un...
ICPP
2000
IEEE
14 years 29 days ago
2000
IEEE
This paper proposes a parallel architecture for quadtreebased fractal image coding. This architecture is capable of performing the fractal image coding based on quadtree partition...
ICCAD
2005
IEEE
14 years 5 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
ICASSP
2011
IEEE
13 years 9 days ago
2011
IEEE
Distributed video coding (DVC) is an emerging video coding paradigm for systems which fully or partly exploit the source statistics at the decoder to reduce the computational burd...
IPPS
1998
IEEE
14 years 25 days ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...