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» Cognition and Affect: Architectures and Tools
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ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
MJ
2007
119views more  MJ 2007»
13 years 9 months ago
Automated energy calculation and estimation for delay-insensitive digital circuits
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
Venkat Satagopan, Bonita Bhaskaran, Anshul Singh, ...
IPPS
2007
IEEE
14 years 4 months ago
Distributed IDS using Reconfigurable Hardware
With the rapid growth of computer networks and network infrastructures and increased dependency on the internet to carry out day-to-day activities, it is imperative that the compo...
Ashok Kumar Tummala, Parimal Patel
CGO
2006
IEEE
14 years 3 months ago
BIRD: Binary Interpretation using Runtime Disassembly
The majority of security vulnerabilities published in the literature are due to software bugs. Many researchers have developed program transformation and analysis techniques to au...
Susanta Nanda, Wei Li, Lap-Chung Lam, Tzi-cker Chi...
KBSE
2005
IEEE
14 years 3 months ago
Determining the cost-quality trade-off for automated software traceability
Major software development standards mandate the establishment of trace links among software artifacts such as requirements, architectural elements, or source code without explici...
Alexander Egyed, Stefan Biffl, Matthias Heindl, Pa...