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» Collaborative Routing Architecture for FPGA
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DAC
2002
ACM
16 years 4 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
15 years 6 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
NOCS
2007
IEEE
15 years 9 months ago
Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances
In this paper we present a new clustered mesh FPGA architecture where each cluster local interconnect is implemented as an MFPGA tree network [6]. Unlike previous clustered mesh a...
Zied Marrakchi, Hayder Mrabet, Christian Masson, H...
SC
2004
ACM
15 years 8 months ago
Collaborative User-Centric Lambda-Grid over Wavelength-Routed Network
Emerging lambda-Grid systems employ wavelength-routed network with optical switches to enable dynamic on-demand lightpaths with multi-gigabit rate bandwidth to interconnect shared...
Oliver T. Yu, Thomas A. DeFanti
SIGCOMM
1998
ACM
15 years 7 months ago
The MASC/BGMP Architecture for Inter-Domain Multicast Routing
Multicast routing enables e cient data distribution to multiple recipients. However, existing work has concentrated on extending single-domain techniques to wide-area networks, ra...
Satish Kumar, Pavlin Radoslavov, David Thaler, Cen...