Sciweavers

2468 search results - page 215 / 494
» Collaborative architecture design and evaluation
Sort
View
ICCD
2004
IEEE
98views Hardware» more  ICCD 2004»
14 years 5 months ago
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharide...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 2 months ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
ICPP
2008
IEEE
14 years 2 months ago
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...
Sangyeun Cho, Socrates Demetriades, Shayne Evans, ...
IPPS
2007
IEEE
14 years 2 months ago
A Landmark-based Index Architecture for General Similarity Search in Peer-to-Peer Networks
The indexing of complex data and similarity search plays an important role in many application areas. Traditional centralized index structure can not scale with the rapid prolifer...
Xiaoyu Yang, Yiming Hu
ACSAC
2005
IEEE
14 years 1 months ago
Building a MAC-Based Security Architecture for the Xen Open-Source Hypervisor
We present the sHype hypervisor security architecture and examine in detail its mandatory access control facilities. While existing hypervisor security approaches aiming at high a...
Reiner Sailer, Trent Jaeger, Enriquillo Valdez, Ra...