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ISSS
2002
IEEE
148views Hardware» more  ISSS 2002»
14 years 9 days ago
A Case Study of Hardware and Software Synthesis in ForSyDe
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
Ingo Sander, Axel Jantsch, Zhonghai Lu
FM
1999
Springer
97views Formal Methods» more  FM 1999»
13 years 11 months ago
Sensors and Actuators in TCOZ
Timed Communicating Object Z (TCOZ) combines Object-Z's strengths in modeling complex data and algorithms with Timed CSP's strengths in modeling real-time concurrency. TC...
Brendan P. Mahony, Jin Song Dong
SAS
1999
Springer
124views Formal Methods» more  SAS 1999»
13 years 11 months ago
State Space Reduction Based on Live Variables Analysis
The intrinsic complexity of most protocol speci cations in particular, and of asynchronous systems in general, lead us to study combinations of static analysis with classical model...
Marius Bozga, Jean-Claude Fernandez, Lucian Ghirvu
FORMATS
2010
Springer
13 years 5 months ago
A Framework for Verification of Software with Time and Probabilities
Abstract. Quantitative verification techniques are able to establish system properties such as "the probability of an airbag failing to deploy on demand" or "the exp...
Marta Z. Kwiatkowska, Gethin Norman, David Parker
AGI
2008
13 years 8 months ago
Comirit: Commonsense Reasoning by Integrating Simulation and Logic
Rich computer simulations or quantitative models can enable an agent to realistically predict real-world behavior with precision and performance that is difficult to emulate in log...
Benjamin Johnston, Mary-Anne Williams