11 search results - page 1 / 3 » Combining Symbolic Model Checking with Uninterpreted Functio... |
FMSD
2002
13 years 7 months ago
2002
We present a new technique for verification of complex hardware devices that allows both generality andahighdegreeofautomation.Thetechniqueisbasedonournewwayofconstructinga"li...
AMAI
2004
Springer
14 years 25 days ago
2004
Springer
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...
FMCAD
1998
Springer
13 years 11 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
MJ
2006
13 years 7 months ago
2006
In this paper, we describe a hybrid tool for hardware formal verification that links the HOL (higher-order logic) theorem prover and (multiway decision graphs) model checker. Our ...
ESOP
2008
Springer
13 years 9 months ago
2008
Springer
This paper defines the cover of a formula with respect to a set of variables V in theory T to be the strongest quantifier-free formula that is implied by V : in theory T. Cover e...