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DATE
2010
IEEE
119views Hardware» more  DATE 2010»
14 years 3 months ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
14 years 3 months ago
Reliability- and process variation-aware placement for FPGAs
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
Assem A. M. Bsoul, Naraig Manjikian, Li Shang
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
14 years 3 months ago
A reconfigurable cache memory with heterogeneous banks
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
Domingo Benitez, Juan C. Moure, Dolores Rexachs, E...
ECCV
2010
Springer
14 years 3 months ago
Inferring 3D Shapes and Deformations from Single Views
Abstract. In this paper we propose a probabilistic framework that models shape variations and infers dense and detailed 3D shapes from a single silhouette. We model two types of sh...
EDOC
2002
IEEE
14 years 3 months ago
Model Driven Geo-Information System's Development
Continuous change of user requirements has become a constant for geo-information systems. Designing systems that can adapt to such changes requires an appropriate ethodology that ...
Javier Morales, Luís Ferreira Pires, Marten...