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MICRO
1994
IEEE
99views Hardware» more  MICRO 1994»
14 years 21 days ago
Data relocation and prefetching for programs with large data sets
Numerical applications frequently contain nested loop structures that process large arrays of data. The execution of these loop structures often produces memory preference pattern...
Yoji Yamada, John Gyllenhall, Grant Haab, Wen-mei ...
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
14 years 2 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
JVM
2004
165views Education» more  JVM 2004»
13 years 10 months ago
Using Hardware Performance Monitors to Understand the Behavior of Java Applications
Modern Java programs, such as middleware and application servers, include many complex software components. Improving the performance of these Java applications requires a better ...
Peter F. Sweeney, Matthias Hauswirth, Brendon Caho...
ASPLOS
2012
ACM
12 years 4 months ago
Path-exploration lifting: hi-fi tests for lo-fi emulators
Processor emulators are widely used to provide isolation and instrumentation of binary software. However they have proved difficult to implement correctly: processor specificati...
Lorenzo Martignoni, Stephen McCamant, Pongsin Poos...
CODES
2002
IEEE
14 years 1 months ago
Worst-case performance analysis of parallel, communicating software processes
In this paper we present a method to perform static timing analysis of SystemC models, that describe parallel, communicating software processes.The paper combines a worstcase exec...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...