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CODES
2009
IEEE
13 years 7 months ago
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis
JCB
2006
107views more  JCB 2006»
13 years 6 months ago
Protein Image Alignment via Piecewise Affine Transformations
Abstract We present a new approach for aligning families of 2D gels. Instead of choosing one of the gels as reference and performing pairwise alignment, we construct an ideal gel t...
Florian A. Potra, Xing Liu, Françoise Seill...
ICCAD
2009
IEEE
171views Hardware» more  ICCAD 2009»
13 years 4 months ago
A hybrid local-global approach for multi-core thermal management
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
Ramkumar Jayaseelan, Tulika Mitra
ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
14 years 7 days ago
Opportunities and challenges for better than worst-case design
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
Todd M. Austin, Valeria Bertacco, David Blaauw, Tr...
ISPDC
2010
IEEE
13 years 5 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...