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ASYNC
2000
IEEE
86views Hardware» more  ASYNC 2000»
15 years 8 months ago
An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems
Self-timed systems often have to communicate with their environment through a clocked interface. For example, off-chip memory may require clocking and this can reduce the benefit...
George S. Taylor, Simon W. Moore, Steve Wilcox, Pe...
ICDCS
1997
IEEE
15 years 8 months ago
Dynamic Light-Weight Groups
The virtual synchrony model for group communication has proven to be a powerful paradigm for building distributed applications. In applications that use a large number of groups, ...
Katherine Guo, Luís Rodrigues
CL
2000
Springer
15 years 7 months ago
Concurrent Constraint Programming with Process Mobility
Abstract. We propose an extension of concurrent constraint programming with primitives for process migration within a hierarchical network, and we study its semantics. To this purp...
David Gilbert, Catuscia Palamidessi
APPINF
2003
15 years 5 months ago
Comparing the Optimal Performance of Multiprocessor Architectures
Consider a parallel program with n processes and a synchronization granularity z. Consider also two multiprocessors: a multiprocessor with q processors and run-time reallocation o...
Lars Lundberg, Kamilla Klonowska, Magnus Broberg, ...
PETRA
2010
ACM
15 years 4 months ago
Optimizing pervasive sensor data acquisition utilizing missing values substitution
Acquisition of pervasive sensor data can be often unsuccessful due to power outage at nodes, time synchronization issues, interference, network transmission failures or sensor har...
M. Michalopoulos, Christos Anagnostopoulos, Charal...