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» Communication Mechanisms for Parallel DSP Systems on a Chip
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PVM
1998
Springer
15 years 9 months ago
Implementing MPI with the Memory-Based Communication Facilities on the SSS-CORE Operating System
This paper describes an e cient implementation of MPI on the Memory-Based Communication Facilities; Memory-Based FIFO is used for bu ering by the library, and Remote Write for comm...
Kenji Morimoto, Takashi Matsumoto, Kei Hiraki
IPPS
2006
IEEE
15 years 11 months ago
High-level execution and communication support for parallel grid applications in JGrid
This paper describes the high-level execution and communication support provided in JGrid, a serviceoriented dynamic grid framework. One of its core services, the Compute Service,...
Szabolcs Pota, Zoltan Juhasz
126
Voted
SBCCI
2003
ACM
96views VLSI» more  SBCCI 2003»
15 years 10 months ago
SoCIN: A Parametric and Scalable Network-on-Chip
Networks-on-Chip (NoCs) interconnection architectures to be used in future billion-transistor Systems-on-Chip (SoCs) meet the major communication requirements of these systems, of...
Cesar Albenes Zeferino, Altamiro Amadeu Susin
DATE
2006
IEEE
109views Hardware» more  DATE 2006»
15 years 11 months ago
A methodology for mapping multiple use-cases onto networks on chips
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...
Srinivasan Murali, Martijn Coenen, Andrei Radulesc...
BWCCA
2010
15 years 18 days ago
Advanced Design Issues for OASIS Network-on-Chip Architecture
Network-on-Chip (NoC) architectures provide a good way of realizing efficient interconnections and largely alleviate the limitations of bus-based solutions. NoC has emerged as a so...
Kenichi Mori, Adam Esch, Abderazek Ben Abdallah, K...