362 search results - page 30 / 73 » Communication Mechanisms for Parallel DSP Systems on a Chip |
IPPS
1998
IEEE
14 years 4 days ago
1998
IEEE
In this paper we present the design, implementation and evaluation of a runtime system based on collective I/O techniques for irregular applications. We present two models, namely...
ICS
2010
Tsinghua U.
14 years 21 days ago
2010
Tsinghua U.
– Communication overhead is one of the dominant factors that affect performance in high-performance computing systems. To reduce the negative impact of communication, programmers...
EUROPAR
2001
Springer
14 years 12 days ago
2001
Springer
As the technology for high-speed networks has evolved over the last decade, the interconnection of commodity computers (e.g., PCs and workstations) at gigabit rates has become a re...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
We study three scheduling problems (file redistribution, independent tasks scheduling and broadcasting) on large scale heterogeneous platforms under the Bounded Multi-port Model. I...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon validation of system-on-chip(SOC) designs. The System Verilog langua...