65 search results - page 7 / 13 » Compact Reduced Order Modeling for Multiple-Port Interconnec... |
ICCAD
2007
IEEE
14 years 4 months ago
2007
IEEE
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
CCGRID
2008
IEEE
13 years 9 months ago
2008
IEEE
Abstract--The current trend in high performance computing is to aggregate ever larger numbers of processing and interconnection elements in order to achieve desired levels of compu...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Process variations in modern VLSI technologies are growing in both magnitude and dimensionality. To assess performance variability, complex simulation and performance models param...
DAC
2007
ACM
13 years 11 months ago
2007
ACM
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for secondorder sys...
FMCAD
1998
Springer
13 years 12 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...