128 search results - page 4 / 26 » Comparative Evaluation of Latency Tolerance Techniques for S... |
ICDCS
2000
IEEE
13 years 12 months ago
2000
IEEE
Fault-tolerant techniques that can cope with system failures in software distributed shared memory (SDSM) are essential for creating productive and highly available parallel compu...
GRID
2005
Springer
14 years 1 months ago
2005
Springer
Large latencies over WAN will remain an obstacle to running communication intensive parallel applications on Grid environments. This paper takes one of such applications, Gaussian...
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
ICPP
1995
IEEE
13 years 11 months ago
1995
IEEE
— Large parallel computers require techniques to tolerate the potentially large latencies of accessing remote data. Multithreadingis onesuch technique. We extend previous studies...
IPPS
2003
IEEE
14 years 24 days ago
2003
IEEE
Our recent work on uniprocessor and single-node multiprocessor (SMP) active memory systems uses address remapping techniques in conjunction with extended cache coherence protocols...