415 search results - page 49 / 83 » Comparative evaluation of memory models for chip multiproces... |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
There are two popular parallel programming paradigms available to high performance computing users such as engineering and physics professionals: message passing and distributed s...
QEST
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper provides an experimental study of the efficiency of simulation-based model-checking algorithms for continuous-time Markov chains by comparing: MRMC – the only tool t...
ISCA
2008
IEEE
14 years 2 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
BMCBI
2011
12 years 11 months ago
2011
Background: Copy number data are routinely being extracted from genome-wide association study chips using a variety of software. We empirically evaluated and compared four freely-...
ICPIA
1992
13 years 11 months ago
1992
Abstract. Octrees o er a powerful means for representing and manipulating 3-D objects. This paper presents an implementation of octree manipulations using a new approach on a share...