415 search results - page 61 / 83 » Comparative evaluation of memory models for chip multiproces... |
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
WSC
1997
13 years 9 months ago
1997
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
ICIP
2004
IEEE
14 years 9 months ago
2004
IEEE
Current adaptive FEC schemes used for video streaming applications alter the redundancy in a block of message packets to adapt to varying channel conditions. However, for many pop...
DSP
2008
13 years 7 months ago
2008
In this work, we propose to improve the neighboring relationship ability of the Hidden Markov Chain (HMC) model, by extending the memory lengthes of both the Markov chain process ...