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» Comparing Multiported Cache Schemes
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SIGMETRICS
1997
ACM
117views Hardware» more  SIGMETRICS 1997»
13 years 11 months ago
Informed Multi-Process Prefetching and Caching
Informed prefetching and caching based on application disclosure of future I/O accesses (hints) can dramatically reduce the execution time of I/O-intensive applications. A recent ...
Andrew Tomkins, R. Hugo Patterson, Garth A. Gibson
VEE
2005
ACM
140views Virtualization» more  VEE 2005»
14 years 28 days ago
Planning for code buffer management in distributed virtual execution environments
Virtual execution environments have become increasingly useful in system implementation, with dynamic translation techniques being an important component for performance-critical ...
Shukang Zhou, Bruce R. Childers, Mary Lou Soffa
MICRO
2007
IEEE
144views Hardware» more  MICRO 2007»
14 years 1 months ago
Process Variation Tolerant 3T1D-Based Cache Architectures
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Bro...
RSA
2008
80views more  RSA 2008»
13 years 5 months ago
The persistent-access-caching algorithm
ABSTRACT: Caching is widely recognized as an effective mechanism for improving the performance of the World Wide Web. One of the key components in engineering the Web caching syste...
Predrag R. Jelenkovic, Ana Radovanovic
ECBS
2006
IEEE
211views Hardware» more  ECBS 2006»
14 years 1 months ago
Modified Pseudo LRU Replacement Algorithm
Although the LRU replacement algorithm has been widely used in cache memory management, it is wellknown for its inability to be easily implemented in hardware. Most of primary cac...
Hassan Ghasemzadeh, Sepideh Sepideh Mazrouee, Moha...