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» Comparing Software and Hardware Schemes For Reducing the Cos...
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HPCA
2012
IEEE
12 years 3 months ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 1 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
CASES
2005
ACM
13 years 9 months ago
A post-compilation register reassignment technique for improving hamming distance code compression
Code compression is a field where compression ratios between compiler-generated code and subsequent compressed code are highly dependent on decisions made at compile time. Most op...
Montserrat Ros, Peter Sutton
SIGMETRICS
2010
ACM
233views Hardware» more  SIGMETRICS 2010»
14 years 9 days ago
Incentivizing peer-assisted services: a fluid shapley value approach
A new generation of content delivery networks for live streaming, video on demand, and software updates takes advantage of a peer-to-peer architecture to reduce their operating co...
Vishal Misra, Stratis Ioannidis, Augustin Chaintre...
CODES
2009
IEEE
14 years 2 months ago
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
Time redundancy (rollback-recovery) and hardware redundancy are commonly used in real-time systems to achieve fault tolerance. From an energy consumption point of view, time redun...
Alireza Ejlali, Bashir M. Al-Hashimi, Petru Eles