622 search results - page 96 / 125 » Comparing the Optimal Performance of Multiprocessor Architec... |
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
SIGSOFT
2008
ACM
14 years 9 months ago
2008
ACM
Framework-intensive applications (e.g., Web applications) heavily use temporary data structures, often resulting in performance bottlenecks. This paper presents an optimized blend...
CGF
2011
13 years 3 months ago
2011
This paper presents a parallel framework for simulating fluids with the Smoothed Particle Hydrodynamics (SPH) method. For low computational costs per simulation step, efficient ...
DAC
2010
ACM
13 years 8 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
AFRICACRYPT
2010
Springer
14 years 3 months ago
2010
Springer
This paper describes an implementation of Pollard’s rho algorithm to compute the elliptic curve discrete logarithm for the Synergistic Processor Elements of the Cell Broadband En...