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» Comparing the Optimal Performance of Parallel Architectures
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MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
14 years 1 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
IPSN
2009
Springer
14 years 3 months ago
Simultaneous placement and scheduling of sensors
We consider the problem of monitoring spatial phenomena, such as road speeds on a highway, using wireless sensors with limited battery life. A central question is to decide where ...
Andreas Krause, Ram Rajagopal, Anupam Gupta, Carlo...
LCTRTS
2007
Springer
14 years 2 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
DELTA
2006
IEEE
14 years 4 days ago
Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder
The efficiency of the Public Key encryption systems like RSA and ECC can be improved with the adoption of a faster multiplication scheme. In this paper, Modified Montgomery multip...
Himanshu Thapliyal, Anvesh Ramasahayam, Vivek Redd...
LCTRTS
2005
Springer
14 years 1 months ago
Complementing software pipelining with software thread integration
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
Won So, Alexander G. Dean