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» Comparing the Optimal Performance of Parallel Architectures
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ASAP
2002
IEEE
170views Hardware» more  ASAP 2002»
14 years 9 days ago
Reviewing 4-to-2 Adders for Multi-Operand Addition
Recently there has been quite a number of papers discussing the use of redundant 4-to-2 adders for the accumulation of partial products in multipliers, claiming one type to be sup...
Peter Kornerup
SIGMOD
1998
ACM
117views Database» more  SIGMOD 1998»
13 years 11 months ago
The Pyramid-Technique: Towards Breaking the Curse of Dimensionality
In this paper, we propose the Pyramid-Technique, a new indexing method for high-dimensional data spaces. The PyramidTechnique is highly adapted to range query processing using the...
Stefan Berchtold, Christian Böhm, Hans-Peter ...
BMCBI
2008
111views more  BMCBI 2008»
13 years 7 months ago
Probabilistic base calling of Solexa sequencing data
Background: Solexa/Illumina short-read ultra-high throughput DNA sequencing technology produces millions of short tags (up to 36 bases) by parallel sequencing-by-synthesis of DNA ...
Jacques Rougemont, Arnaud Amzallag, Christian Isel...
BMCBI
2011
12 years 11 months ago
Faster Smith-Waterman database searches with inter-sequence SIMD parallelisation
Background: The Smith-Waterman algorithm for local sequence alignment is more sensitive than heuristic methods for database searching, but also more time-consuming. The fastest ap...
Torbjørn Rognes
DAC
2007
ACM
14 years 8 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy