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113
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PDP
2010
IEEE
15 years 6 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...
126
Voted
FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
15 years 8 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos
180
Voted
NPC
2010
Springer
15 years 18 days ago
Vectorization for Java
Java is one of the most popular programming languages in today’s software development, but the adoption of Java in some areas like high performance computing, gaming, and media p...
Jiutao Nie, Buqi Cheng, Shisheng Li, Ligang Wang, ...
159
Voted
PPOPP
2009
ACM
16 years 2 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...
ICDT
2001
ACM
147views Database» more  ICDT 2001»
15 years 6 months ago
Parallelizing the Data Cube
This paper presents a general methodology for the efficient parallelization of existing data cube construction algorithms. We describe two different partitioning strategies, one f...
Frank K. H. A. Dehne, Todd Eavis, Susanne E. Hambr...