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HPCA
2011
IEEE
13 years 16 days ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
ICDCS
2000
IEEE
14 years 1 months ago
Improving Distributed Workload Performance by Sharing both CPU and Memory Resources
We develop and examine job migration policies by considering effective usage of global memory in addition to CPU load sharing in distributed systems. When a node is identified fo...
Xiaodong Zhang, Yanxia Qu, Li Xiao
ICS
1998
Tsinghua U.
14 years 1 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
BMCBI
2005
152views more  BMCBI 2005»
13 years 8 months ago
Improved profile HMM performance by assessment of critical algorithmic features in SAM and HMMER
Background: Profile hidden Markov model (HMM) techniques are among the most powerful methods for protein homology detection. Yet, the critical features for successful modelling ar...
Markus Wistrand, Erik L. L. Sonnhammer
COMPLEXITY
2004
165views more  COMPLEXITY 2004»
13 years 8 months ago
Sex promotes gamete selection: A quantitative comparative study of features favoring the evolution of sex
: Explaining the maintenance of sexual reproduction remains one of the greatest challenges in biology. The theoretical oddity of sex is based on at least three advantages that asex...
Klaus Jaffe