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» Comparison of Hardware and Software Cache Coherence Schemes
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HPCA
1999
IEEE
13 years 12 months ago
Improving CC-NUMA Performance Using Instruction-Based Prediction
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
Stefanos Kaxiras, James R. Goodman
POS
1992
Springer
13 years 11 months ago
Supporting Large Persistent Stores using Conventional Hardware
Persistent programming systems are generally supported by an object store, a conceptually infinite object repository. Objects in such a repository cannot be directly accessed by u...
Francis Vaughan, Alan Dearle
DSN
2008
IEEE
13 years 9 months ago
Detouring: Translating software to circumvent hard faults in simple cores
CMOS technology trends are leading to an increasing incidence of hard (permanent) faults in processors. These faults may be introduced at fabrication or occur in the field. Wherea...
Albert Meixner, Daniel J. Sorin
ECBS
2006
IEEE
211views Hardware» more  ECBS 2006»
14 years 1 months ago
Modified Pseudo LRU Replacement Algorithm
Although the LRU replacement algorithm has been widely used in cache memory management, it is wellknown for its inability to be easily implemented in hardware. Most of primary cac...
Hassan Ghasemzadeh, Sepideh Sepideh Mazrouee, Moha...
ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
13 years 11 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...